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CMOS Technology Characterization for Analog and RF Design

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268IEEE JOURNAL OF SOLID-STATE CIRCUITS,VOL.34,NO.3,MARCH1999 CMOS Technology Characterization

for Analog and RF Design

Behzad Razavi,Member,IEEE

Abstract—The design of analog and radio-frequency(RF) circuits in CMOS technology becomes increasingly more difficult as device modeling faces new challenges in deep submicrometer processes and emerging circuit applications.The sophisticated set of characteristics used to represent today’s“digital”technologies often proves inadequate for analog and RF design,mandating many additional measurements and iterations to arrive at an acceptable solution.This paper describes a set of characterization vehicles that can be employed to quantify the analog behavior of active and passive devices in CMOS processes,in particular, properties that are not modeled accurately by SPICE parameters. Test structures and circuits are introduced for measuring speed, noise,linearity,loss,matching,and dc characteristics.

Index Terms—Analog circuits,device noise,mismatch,MOS devices,RF circuits,technology characterization.

I.I NTRODUCTION

A S CMOS technology continues to benefit from both

scaling and the enormous momentum of the digital market,many high-speed and radio-frequency(RF)integrated circuits that were once considered the exclusive domain of III–V or silicon bipolar technologies are likely to appear as CMOS implementations.However,issues such as technology development costs,computer-aided design(CAD)infrastruc-ture,and fabrication turnaround time make it desirable to use a single mainstream digital CMOS process for all IC products.“Analog processes”may be approaching extinction.

The design of analog and RF circuits in a digital CMOS technology faces many difficulties:the set of available active and passive devices is quite limited,the technology is opti-mized for digital design,and the devices are characterized and modeled according to simple benchmarks such as current drive and gate delay.While thefirst two issues can be somewhat alleviated by circuit and architecture innovations,the quandary of poor characterization leads to substantial conservatism in analog design,thus resulting in circuits that do not exploit the“raw”speed of the technology.In some cases,even conservatism does not solve the problem,mandating lengthy iterations in the design.For example,in a narrow-band RF oscillator,it is difficult to guarantee a correct output frequency without accurate data on device parasitics and their variation with process and temperature.

This paper describes a set of technology characterization methods that provide the basic information required in ana-

Manuscript received August11,1998;revised October26,1998.

The author is with the Electrical Engineering Department,University of California,Los Angeles,CA90095USA.

Publisher Item Identifier S

CMOS Technology Characterization for Analog and RF Design

0018-9200(99)01651-0.

Fig.1.Analog design octagon.

log and RF design.It also reviews some relevant modeling

difficulties.Section II presents the motivation for and the

issues related to the task.Sections III and IV deal with

characterization for analog and RF design,respectively.For

the sake of brevity,we use the term“analog”to mean“analog

and RF.”

II.M OTIV ATION AND I SSUES

The principal difficulty in using a digital CMOS technol-

ogy for analog design is that the process is optimized and

characterized for primarily one tradeoff:that between speed

and power dissipation.By contrast,analog circuits entail a

multidimensional design space.This is illustrated in Fig.1,

where almost every two parameters trade with each other.The

true severity of these tradeoffs is known only if relevant data

have been obtained for the technology.

The need for specialized“analog characterization”arises

from two types of shortcomings:inaccurate modeling(e.g.,the

output resistance of transistors or its nonlinearity)or simply

lack of modeling(e.g.,self-resonance frequency of inductors

or matching properties of transistors).While efforts toward

improving submicrometer device models continue vigorously,

scaling appears to degrade the modeling accuracy faster.That

is,it seems that for no generation of CMOS devices have

models been sufficiently accurate.1

It is also important to note the rapid migration of digital

circuits from one generation of the technology to the next.

Analog circuits have historically lagged behind by more than

one generation,failing to utilize the full potential of new

processes or to comply with their supply-voltage scaling.A

solid understanding of the properties and limitations of devices

1This is the author’s opinion rather than a documented fact.

0018–9200/99$10.00©1999IEEE

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